mirror of
https://github.com/ceph/ceph-csi.git
synced 2024-12-22 13:00:19 +00:00
0f53f2385f
Bumps [github.com/prometheus/client_golang](https://github.com/prometheus/client_golang) from 1.11.0 to 1.12.0. - [Release notes](https://github.com/prometheus/client_golang/releases) - [Changelog](https://github.com/prometheus/client_golang/blob/main/CHANGELOG.md) - [Commits](https://github.com/prometheus/client_golang/compare/v1.11.0...v1.12.0) --- updated-dependencies: - dependency-name: github.com/prometheus/client_golang dependency-type: direct:production update-type: version-update:semver-minor ... Signed-off-by: dependabot[bot] <support@github.com>
216 lines
3.5 KiB
ArmAsm
216 lines
3.5 KiB
ArmAsm
// +build !appengine
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// +build gc
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// +build !purego
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#include "textflag.h"
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// Register allocation:
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// AX h
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// SI pointer to advance through b
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// DX n
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// BX loop end
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// R8 v1, k1
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// R9 v2
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// R10 v3
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// R11 v4
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// R12 tmp
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// R13 prime1v
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// R14 prime2v
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// DI prime4v
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// round reads from and advances the buffer pointer in SI.
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// It assumes that R13 has prime1v and R14 has prime2v.
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#define round(r) \
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MOVQ (SI), R12 \
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ADDQ $8, SI \
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IMULQ R14, R12 \
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ADDQ R12, r \
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ROLQ $31, r \
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IMULQ R13, r
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// mergeRound applies a merge round on the two registers acc and val.
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// It assumes that R13 has prime1v, R14 has prime2v, and DI has prime4v.
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#define mergeRound(acc, val) \
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IMULQ R14, val \
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ROLQ $31, val \
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IMULQ R13, val \
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XORQ val, acc \
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IMULQ R13, acc \
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ADDQ DI, acc
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// func Sum64(b []byte) uint64
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TEXT ·Sum64(SB), NOSPLIT, $0-32
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// Load fixed primes.
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MOVQ ·prime1v(SB), R13
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MOVQ ·prime2v(SB), R14
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MOVQ ·prime4v(SB), DI
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// Load slice.
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MOVQ b_base+0(FP), SI
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MOVQ b_len+8(FP), DX
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LEAQ (SI)(DX*1), BX
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// The first loop limit will be len(b)-32.
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SUBQ $32, BX
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// Check whether we have at least one block.
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CMPQ DX, $32
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JLT noBlocks
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// Set up initial state (v1, v2, v3, v4).
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MOVQ R13, R8
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ADDQ R14, R8
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MOVQ R14, R9
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XORQ R10, R10
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XORQ R11, R11
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SUBQ R13, R11
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// Loop until SI > BX.
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blockLoop:
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round(R8)
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round(R9)
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round(R10)
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round(R11)
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CMPQ SI, BX
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JLE blockLoop
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MOVQ R8, AX
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ROLQ $1, AX
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MOVQ R9, R12
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ROLQ $7, R12
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ADDQ R12, AX
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MOVQ R10, R12
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ROLQ $12, R12
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ADDQ R12, AX
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MOVQ R11, R12
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ROLQ $18, R12
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ADDQ R12, AX
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mergeRound(AX, R8)
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mergeRound(AX, R9)
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mergeRound(AX, R10)
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mergeRound(AX, R11)
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JMP afterBlocks
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noBlocks:
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MOVQ ·prime5v(SB), AX
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afterBlocks:
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ADDQ DX, AX
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// Right now BX has len(b)-32, and we want to loop until SI > len(b)-8.
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ADDQ $24, BX
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CMPQ SI, BX
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JG fourByte
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wordLoop:
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// Calculate k1.
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MOVQ (SI), R8
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ADDQ $8, SI
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IMULQ R14, R8
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ROLQ $31, R8
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IMULQ R13, R8
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XORQ R8, AX
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ROLQ $27, AX
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IMULQ R13, AX
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ADDQ DI, AX
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CMPQ SI, BX
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JLE wordLoop
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fourByte:
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ADDQ $4, BX
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CMPQ SI, BX
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JG singles
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MOVL (SI), R8
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ADDQ $4, SI
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IMULQ R13, R8
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XORQ R8, AX
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ROLQ $23, AX
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IMULQ R14, AX
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ADDQ ·prime3v(SB), AX
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singles:
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ADDQ $4, BX
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CMPQ SI, BX
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JGE finalize
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singlesLoop:
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MOVBQZX (SI), R12
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ADDQ $1, SI
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IMULQ ·prime5v(SB), R12
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XORQ R12, AX
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ROLQ $11, AX
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IMULQ R13, AX
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CMPQ SI, BX
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JL singlesLoop
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finalize:
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MOVQ AX, R12
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SHRQ $33, R12
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XORQ R12, AX
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IMULQ R14, AX
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MOVQ AX, R12
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SHRQ $29, R12
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XORQ R12, AX
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IMULQ ·prime3v(SB), AX
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MOVQ AX, R12
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SHRQ $32, R12
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XORQ R12, AX
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MOVQ AX, ret+24(FP)
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RET
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// writeBlocks uses the same registers as above except that it uses AX to store
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// the d pointer.
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// func writeBlocks(d *Digest, b []byte) int
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TEXT ·writeBlocks(SB), NOSPLIT, $0-40
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// Load fixed primes needed for round.
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MOVQ ·prime1v(SB), R13
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MOVQ ·prime2v(SB), R14
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// Load slice.
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MOVQ b_base+8(FP), SI
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MOVQ b_len+16(FP), DX
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LEAQ (SI)(DX*1), BX
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SUBQ $32, BX
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// Load vN from d.
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MOVQ d+0(FP), AX
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MOVQ 0(AX), R8 // v1
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MOVQ 8(AX), R9 // v2
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MOVQ 16(AX), R10 // v3
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MOVQ 24(AX), R11 // v4
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// We don't need to check the loop condition here; this function is
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// always called with at least one block of data to process.
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blockLoop:
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round(R8)
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round(R9)
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round(R10)
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round(R11)
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CMPQ SI, BX
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JLE blockLoop
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// Copy vN back to d.
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MOVQ R8, 0(AX)
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MOVQ R9, 8(AX)
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MOVQ R10, 16(AX)
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MOVQ R11, 24(AX)
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// The number of bytes written is SI minus the old base pointer.
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SUBQ b_base+8(FP), SI
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MOVQ SI, ret+32(FP)
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RET
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